Digital Verification Engineer
- Paris Grenoble, Isère
- CDI
- Temps-plein
- Develop and execute verification plans at subsystem and SoC levels
- Contribute to verification methodology and flow improvements
- Build and maintain testbenches and self-checking test cases
- Run RTL and Gate-Level regression tests, including coverage analysis
- Support mixed-signal simulations with the Analog team
- Collaborate with the Software team on emulation platforms
- Assist in silicon validation of manufactured SoCs
- Follow internal QA and test procedures
- MSc or PhD in Electrical Engineering or equivalent
- 3+ years of hands-on experience in digital verification
- Solid background in digital electronics and signal processing
- Proficient in SystemVerilog and/or UVM testbench development
- Skilled in scripting (Python, Tcl, Makefile, etc.)
- UVM methodology and AMBA bus verification (APB, AXI, AHB)
- CPU verification (ARM, RISC-V) and C-based testing
- Interfaces: PCIe, Ethernet, DRAM
- Verification of digital blocks for ADCs, DACs, RF transceivers