
Digital Verification Team Leader
- Paris Grenoble, Isère
- CDI
- Temps-plein
- Lead all technical aspects of digital verification at subsystem and SoC levels
- Define and implement verification strategies and contribute to methodology and flow improvements
- Develop and maintain simulation-based and emulation-based verification plans
- Build testbenches and self-checking test cases for subsystem and top-level verification
- Collaborate with AMS and software teams, including support on emulation platforms
- Assist the Silicon Validation team in post-silicon evaluation
- Ensure compliance with internal QA and test procedures
- MSc or PhD in Electrical Engineering (or equivalent)
- 7+ years of experience in digital and SoC-level verification
- Strong knowledge of:
- Digital electronics and RTL design (VHDL/Verilog)
- SystemVerilog and UVM testbench development
- Scripting languages: Python, Tcl, Makefile, etc.
- CPU verification (ARM, RISC-V), C-based test development
- SoC emulation platforms: Palladium, Zebu, Veloce
- Verification of high-speed interfaces: PCIe, Ethernet, DRAM
- Experience with C++/SystemC, Gate-Level Simulations (GLS), or DFT
- Familiarity with Git and version/database management tools